java.lang.Object
com.pnfsoftware.jeb.core.units.code.asm.processor.arch.AbstractRegisterBank
com.pnfsoftware.jeb.core.units.code.asm.processor.arch.RegisterBankArm
All Implemented Interfaces:
IRegisterBank

public class RegisterBankArm extends AbstractRegisterBank
Register bank for an ARM 32-bit processor.
  • Field Details

    • regGrp_GP

      public static final int regGrp_GP
      See Also:
    • regGrp_BANKED

      public static final int regGrp_BANKED
      See Also:
    • regGrp_COPROC

      public static final int regGrp_COPROC
      See Also:
    • regGrp_SIMD

      public static final int regGrp_SIMD
      See Also:
    • regGrp_FP_SYSTEM

      public static final int regGrp_FP_SYSTEM
      See Also:
    • regGrp_Flags

      public static final int regGrp_Flags
      See Also:
    • UNPREDICTABLE

      public static final String UNPREDICTABLE
      See Also:
    • SYS_BITSTART_MASK_THRESHOLD

      public static final int SYS_BITSTART_MASK_THRESHOLD
      See Also:
    • CPSR_Aliases

      public static final String[] CPSR_Aliases
    • APSR_MASK

      public static final int APSR_MASK
      See Also:
    • APSR_nzcv_MASK

      public static final int APSR_nzcv_MASK
      See Also:
    • SPSR_Aliases

      public static final String[] SPSR_Aliases
    • LEGACY_APSR_nzcv

      public static final int LEGACY_APSR_nzcv
    • LEGACY_APSR

      public static final int LEGACY_APSR
    • CPSR

      public static final int CPSR
      There are actually 2 Flag registers:
    • CPSR/APSR (named differently regarding bits used or instruction)
    • SPSR (when not in User Mode)

    • We use bitstart for alias
      See Also:
    • SPSR

      public static final int SPSR
    • BankedRegisters

      public static String[] BankedRegisters
  • Method Details