DUtil

Check for instruction matching in the provided block. The block must be fully matched.

Check for instruction matching in a sequence of blocks. Blocks must be fully contiguous and fully matched.
This is an extended version of #checkBlock(BasicBlock, DOpcodeType...), which performs matching on a single block.

Count the number of occurrences of a given variable in the provided IR expression.

Create an IR variable id.

Create an IR variable id.

Dump an IR-CFG to a Graphviz dot file in the user's temporary folder.

Dump an IR-CFG to a Graphviz dot file in the user's temporary folder.

Determine the aggregated context type of an instruction.

Get the list of reachable blocks of the provided IR-CFG. They are the blocks that can be reached, regularly or irregularly, from the entry-point block (i.e. the first block, at offset 0).

Determine whether the IR expression makes invocations (general invocations, new, new-array).

Determine whether the provided expression contains variables.

Determine whether the provided field is or appears to be final.

This heuristic determines whether the right-hand side of the instruction (the 'source', in the case of an assignment) may have side-effects, i.e. whether it may modify the program state or alter its execution flow in unexpected ways.

This heuristic determines whether the provided expression may have side-effects, i.e. whether it may modify the program state or alter its execution flow in unexpected ways.

This heuristic determines whether the provided expression may possibly throw.

Remove all gaps from the provided IR-CFG.

Gaps are illegal in an IR-CFG. They are tolerated during an optimization phase; however, an optimizer, or any code modifying the IR, must provide a legal IR to subsequent components.

Remove unreachable blocks from an IR-CFG. They are blocks that cannot be reached, regularly or irregularly, from the entry-point block (i.e. the first block, at offset 0).

Unreachable blocks are illegal in an IR-CFG. They are tolerated during an optimization phase; however, an optimizer, or any code modifying the IR, must provide a legal IR to subsequent components.

Remove unreachable blocks from an IR-CFG. They are blocks that cannot be reached, regularly or irregularly, from the entry-point block (i.e. the first block, at offset 0).

Unreachable blocks are illegal in an IR-CFG. They are tolerated during an optimization phase; however, an optimizer, or any code modifying the IR, must provide a legal IR to subsequent components.

Remove blocks not reachable from the entry block (first block) of a CFG.

Simply DOpcodeType#JCOND and IR_SWITCH IR instructions:
- JCOND: the target branch must not point to the fallthrough instruction; if it is, the JCOND must be replaced by a JUMP (while taking care of potential side-effects introduced by the evaluation of the JCOND predicate)
- SWITCH: the case targets must not point to the fallthrough instruction; if any does, the case entry must be removed (and will be taken care by the switch's default entry)

Illegal JCOND/SWITCH are tolerated during an optimization phase; however, an optimizer, or any code modifying the IR, must provide a legal IR to subsequent components.

Unprotect a basic block. The CFG is adjusted cleaned afterward.

Determine whether the IR expression uses references, defined as any of: accessing fields, accessing array elements, creating arrays.

DFA utility method: check whether a register, used in multiple places, was defined by a single instruction.

DFA utility method.

DFA utility method.

DFA utility method.

Verify an IR-CFG.

Verify an IR-CFG.

Verify an IR-CFG.

Verify an IR-CFG.

DFA utility method: check whether a register, used somewhere, was defined by a single instruction.

DFA utility method.